Photograph Name Prof. MANOJ SAXENA
Email Id saxenamanoj77@gmail.com Date Of Join 16/07/2001
Designation Professor Mobile No --
Address Room No. 114, First Floor, Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi, New Delhi 110078
Web Page http://www.researcherid.com/rid/K-3863-2015
Educational Qualifications
Degree Institution Year
Ph. D Electronics Department of Electronic Science, University of Delhi 2006
M. Sc Electronics Department of Electronic Science, University of Delhi 2000
B. Sc. Hons Electronics Rajdhani College, University of Delhi 1998
Career Profile
  • Lecturer, Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi (August 2000 - December 2005)
  • Assistant Professor, Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi (01/01/2006 – 26/08/2006)
  • Assistant Professor (Senior Lecturer), Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi (27/08/2006 – 26/08/2009) 
  • Assistant Professor (Reader), Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi (27/08/2009 - Till Date) 
  • Associate Professor, Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi (27/08/2012 - 17/07/2018) 
  • Professor, Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi (18/07/2018 - Till Date) 
Administrative Assignments
Year 2021 – 2022
  • IQAC Coordinator 
  • Coordinator-DBT Star College Scheme
  • Coordinator-IIRS-DDUC Chapter
  • Member –NIRF Committee
  • Member-Time Table Committee
  • Member-Admission Committee
Year 2020 – 2021
  • IQAC Coordinator 
  • Coordiinator-MHRD-IIC-DDUC Chapter
  • Coordinator-DBT Star College Scheme
  • Nodal Officer Acadmic Activities - RUSA
  • Convener – Science Foundation
  • Member –NIRF Committee
  • Member-Time Table Committee
  • Member-Admission Committee
Year 2019 – 2020
  • IQAC Coordinator (December 08, 2017 - )
  • Coordiinator-MHRD-IIC-DDUC Chapter
  • Coordinator-DBT Star College Scheme
  • Nodal Officer Acadmic Activities - RUSA
  • Convener – Science Foundation
  • Member – College Research Committee (December 08, 2017 - December 2019 )
  • Member –NIRF Committee
  • Member-Time Table Committee
  • Member-Admission Committee
Year 2018 – 2019
  • IQAC Coordinator (December 08, 2017 - )
  • Coordiinator-MHRD-IIC-DDUC Chapter
  • Treasurer-Staff Association (Teaching)
  • Cordinator-DBT Star College Scheme
  • Nodal Officer Acadmic Activities - RUSA
  • Convener – Science Foundation
  • Convener – College Research Committee (Till December 08, 2017)
  • Member – College Research Committee (December 08, 2017 - )
  • Convener – Website Committee
  • Member –NIRF Committee
  • Member – UGC XIITH Plan Grants Committee
  • Member-Time Table Committee
Year 2017 – 2018
  • Convener-Research Centre
  • Nodal Officer Acadmic Activities - RUSA
  • Convener – Science Foundation
  • Convener  – College Research Committee
  • Convener – Website Committee
  • Convener – India Today NIELSEN Survey Committee for Science, Commerce and Arts
  • Election Officer – DDU College Alumni Election for Executive 2016-2017.
  • Member –NIRF Committee
  • Member – UGC XIITH Plan Grants Committee
  • Member - Committee for ERP solution for paperless administrative, financial and academic management of the College
  • Member-Time Table Committee
  • Member-Admission Committee for Electronics
Year 2016 – 2017
  • Convener-Research Centre 
  • Convener – Science Foundation
  • Convener  – College Research Committee
  • Convener – Website Committee
  • Convener – India Today NIELSEN Survey Committee for Science, Commerce and Arts
  • Election Officer – DDU College Alumni Election for Executive 2016-2017.
  • Member – UGC XIITH Plan Grants Committee 
  • Member - Committee for ERP solution for paperless administrative, financial and academic management of the College
 
Year 2015 – 2016
Teacher-in-Charge – Department of Electronics 
Convener-Research Centre 
Convener – Science Foundation
Convener  – College Research Committee (November 19, 2015 - )
Convener – Website Committee
Convener – Career Counseling and Placement Cell
Convener-Admission Committee for Electronics
Member- Academic Development Committee
Member - Library Committee
Member – Alumni Committee of College
Member – College Research Committee (Till November 19, 2015)
Member – College Internal Quality Assurance Cell (IQAC) (Till November 19, 2015)
Member – College Archives Committee
Member – UGC XIITH Plan Grants Committee 
Member – Generic Committee Allotment Committee
Member - Screening Committee for Professor Application to outside institutions
Member - Screening Committee for Appointing Vice-Principal of the College
Member - Committee for ERP solution for paperless administrative, financial and academic management of the College
Member-Time Table Committee
Member – NIRF Committee
 
Year 2014 – 2015
Teacher-in-Charge – Department of Electronics 
Convener-Research Centre
Convener-AICTE form filling up committee
Convener – Website Committee
Convener – Career Counseling and Placement Cell
Member- Academic Devlopment Committee
Member-Library Committee
Member – Alumni Committee of College
Member – College Research Committee
Member – College Internal Quality Assuarnace Cell (IQAC) 
Member – College Archives Committee
Member – UGC XIITH Plan Grants Committee 
Member - Screening Committee for Appointing Vice-Principal of the College
Member-Time Table Committee
Convener-Admission Committee for Electronics
 
Year 2013 – 2014
Convener – Website Committee
Convener – Career Counseling and Placement Cell
Member – College Archives Committee
Member – Alumni Committee of College
Convener- Committee for Sending Proposal to DU regarding MSME, Govt. of India.
Member – UGC XIITH Plan Grants Committee 
Member – College NAAC Steering Committee 
Member – College Research Committee
Member – College Internal Quality Assuarnace Cell (IQAC) 
 
Year 2012 – 2013
Convener – College Archives Committee
Convener - Prospectus Committee
Convener – Career Counseling and Placement Cell
Member – Website Committee
Member – Alumni Committee of College
Member – College Committee for Antardhvani 2013, University of Delhi
 
Year 2011 – 2012
Convener-Career Counseling and Placement Cell
Member-Admission Committee
Member – Alumni Committee of College
Member – Departmental Technical and Purchase Committee
 
Year 2010 – 2011
Convener – Placement Cell
Member – Gandhi Study Circle, DDU College
Member – Rajiv Gandhi Study Circle, DDU College
Member – Alumni Committee of College
Member – Departmental Technical and Purchase Committee
Member – Lab. Development Committee for Labs in New Block
 
Year 2009 – 2010
Convener – Aryabhatta Science Forum
Member – Gandhi Study Circle, DDU College
Member – Rajiv Gandhi Study Circle, DDU College
Member - Prospectus Committee
Member – Canteen Committee
Member – Committee for purchase of office automation software for college
Member – Committee for renovation of furniture for staff room, principal office and seminar room of college
 
Year 2008 – 2009
Convener - Prospectus Committee
Member –Magazine Committee
Member – Canteen Committee
Member - Placement Cell
Member - Admission Committee
Member - Website Committee
Member – Aryabhatta Science Forum
 
Year 2007 – 2008
Convener - College Prospectus Committee
Co-Convener - Time Table Committee
Treasurer- DDUC Teaching Staff Association
Member - College Placement Cell
Member - Admission Committee
Member - Library Stock Verification Committee
 
Year 2006 – 2007
Convener - College Prospectus Committee
Member - College Placement Cell
Member - Admission Committee
Member - Library Stock Verification Committee
Member - Purchase Committee
Member - Departmental Lab. maintenance Committee
 
Year 2005 - 2006
Member - Student Activity Committee
Member - College Prospectus Committee
Member - College Website Committee
Member - Departmental Purchase Committee
Member - College Infrastructure Development Committee
Member - Proctorial Board
Member - Aryabhatta Science Forum
Member - Library Stock Verification Committee
Member - Admission Committee
Member - Purchase Committee
Treasurer- DDUC Teaching Staff Association
 
Year 2004 - 2005
Member - Technical Library Purchase Committee.
Member - Library Stock Verification Committee 
Member - Departmental Technical Committee 
Member - Departmental Time Table Committee 
Member - Student Activity Committee 
Member - Prospectus Committee 
Member - Website Development Committee
 
Year 2003 - 2004
Member - Technical purchase Committee
Member - Discipline Committee 
Member - Sports Committee  
Areas of Interest / Specialization
Modeling and simulation of sub-100 nm Nanoelectronics Devices:
  • Epitaxial Channel and Drain Engineered MOSFET
  • Dual/ Tripple Material Gate (DMG/ TMG) MOSFET
  • Silicon on Nothing (SON) MOSFET
  • Insulated Shallow Extension (ISE) MOSFET
  • Recessed Channel/ Grooved/ Concave Gate MOSFET 
  • Tunnel FET
  • Optically Controlled FET (OPFET)
  • Mercuric Iodide (HgI2) X-Ray Detectors
  • High Electron Mobility Transistor (HEMT)
Subjects Taught

Post Graduate Level (As Visiting Faculty)

Course

Year

M. Sc Electronics (IVth Semester) - VLSI Circuit Design and Device Modelling – 4.2 (Deptt. Of Electronic Science, University of Delhi South Campus)

 

Jan 2013 – April 2013
Jan 2012 – April 2012
January 2011 – April 2011

M. Sc Electronics (Ist Semester) -  Advance Analog and Digital Electronics - 1.4 - (Deptt. Of Electronic Science, University of Delhi South Campus)

 

July 2012 – December 2012
July 2011 – December 2011
July 2010 – December 2010
July 2009 – December 2009
July 2008 – December 2008
July 2005 – December 2005
July 2004 – December 2004

M. Sc Informatics – Introduction to Communication Systems – IT-13 - (Institute of Informatics & Communication, University of Delhi South Campus)

2005-2006

 
 
Under Graduate Level
 

B. Sc. (H) Electronics IV Semester – Signal and Systems

January  2017 – April 2017
January  2018 – April 2018

B. Sc. (H) Electronics IV Semester – Operational Amplifier

January  2019 – April 2019
January  2020 – April 2020
January  2021 – April 2021

B. Sc. (H) Electronics III Semester – Electronic Circuits

July 2016 – November 2016
July 2017 – November 2017
July 2018 – November 2018
July 2019 – November 2019
July 2020 – November 2020
July 2021 – November 2021

B. Sc. (H) Electronics II Semester – Applied Physics

January 2016 – April 2016

B. Sc. (H) Electronics I Semester – Mathematics Foundation for Electronics

July 2015-November 2015

B. Tech Electronics (FYUP) - III Semester – Analog Electronics-I

July 2014-November 2014

B. Tech Electronics (FYUP) – II Semester – Semiconductor Devices

January 2014-April 2014

B. Sc. (H) Electronics III Semester – Analog Electronics-I

July 2013-November 2013
July 2012-November 2012
July 2011-November 2011

B. Sc. (H) Electronics II Semester – Signal and Systems

January 2015-April 2015
January 2013-April 2013
January 2012-April 2012
January 2011-April 2011

B. Sc. (H) Electronics I Semester – Network Analysis

July 2010-November 2010

B. Sc. (H) Electronics I year – Network Analysis and Linear Active circuits

2009-2010
2008-2009
2007-2008
2004-2005
2003-2004
2002-2003

B. Sc. (H) Electronics II year – Operational Amplifier and Analog Computation

2009-2010
2008-2009
2007-2008
2006-2007
2005-2006

B. Sc. (H) Electronics II year – Numerical analysis and FORTRAN programming

2008-2009
2007-2008

B. Sc. (H) Electronics III year – Engineering Drawing

2003-2004

B. Sc. (H) Electronics III year – Power Electronics

2006-2007
2005-2006

B. Sc. (H) Electronics III year – Communication System

2003-2004
2002-2003

B. Sc (H) Computer Science I semester  - Digital Electronics

2006-2007
2005-2006
2004-2005

B. Sc (H) Computer Science II semester  - Analog Electronics

2003-2004

B. Sc (H) Computer Science V semester  - Microprocessor

2004-2005
2003-2004

 

 

Research Guidance

Supervision of awarded Doctoral Thesis

Two

Supervision of Doctoral Thesis, under progress

Six

Supervision of awarded M.Phil dissertations

Three

Supervision of M.Phil dissertations, under progress

Nil

 
Research Guidance/ Supervision - Joint Supervision

Joint Supervision

S. No.

Title

Candidate’s name and Affiliation

Year

Status

1.

Modeling and simulation of Nanoscale Dual Material Gate Insulated Shallow Extension Silicon on Nothing MOSFET for Low voltage low power applications

Ms. Vandana Kumari, Research Scholar, UGC-NET (LS)
(Joint Supervision)
Department of Electronic Science,
University of Delhi South Campus, New Delhi.

Jan-2010

Awarded

2.

Analytical Modeling and Simulation Study of BioFETs for Label Free Electrical Detection of Biomolecules

Mr. Ajay, Research Scholar, UGC-NET-JRF
(Joint Supervision)
Department of Electronic Science,
University of Delhi South Campus, New Delhi.

July-2013

Awarded

3.

Modeling and Simulation of Steep Subthreshold Emerging Research Devices for Energy Efficient Low Power Sensing Applications

Mr. Avashesh Dubey, UGC-NET
(Joint Supervision)
Department of Electronic Science,
University of Delhi South Campus, New Delhi.

January-2015

Submitted

4.

Experimental Study of Metal Conntacts on AlGaN/GaN HEMTs for Device DC and RF Charecteristics improvement and thier response under Gamma Radiation

Mr. Ajay Vishwakarma
(Joint Supervision)
Department of Electronic Science,
University of Delhi South Campus, New Delhi.

August 2017

On-Going

5.

Modeling and Simulation of Field Plate HEMT

Ms. Neha, Department of Electronic Science,
University of Delhi South Campus, New Delhi.

August 2017

On-Going

6.

Modeling, Simulation and performance comparison of AlGaN and GaN Channel HEMTs
Ms. Anupama
(Joint Supervision)
Department of Electronic Science, 
University of Delhi South Campus, New Delhi.
 
August 2019 On-Going
7. Numerical Investigation of Advaned AlGaN/GaN HEMT for high power Applications
Mr. Khushwant Sehra
(Joint Supervision)
Department of Electronic Science, 
University of Delhi South Campus, New Delhi.
 
August 2019 On-Going
8. AlGaN/ GaN HEMT & MIS HEMT Devices and their responses under radiation and different stress conditions
Ms. Chanchal Saraswat, Ph. D Student
(Joint Supervision)
Department of Electronic Science, 
University of Delhi South Campus, New Delhi.
January 2021 On-Going


Supervision of M. Phil dissertation

Name of the Candidate

Title of the Dissertation

University/ Roll. No.

Year/ Status

Ms. Rakhi Narang

A Gate-Induced Drain-Leakage Current Model for Fully Depleted Double-Gate MOSFETS

Reg. No – 605011080014

2009/ Awarded

Ms. Sonia Ahlawat

Modeling and Analysis of Body Potential of  Cylindrical Gate-All-Around Nanowire Transistor

Reg. No -605011080015

2009/ Awarded

Ms. Neha

Microwave Modeling and Parameter extraction method for Quantum Well Laser

Reg. No –C8HR016M1250029

2009/ Awarded

 

At National Level
(Summer Research Fellowship Sponsored by Indian Academy of Sciences (IAS), National Academy of Sciences, India (NASI) & Indian National Science Academy (INSA))

S. No.

Title

Candidate’s name and Affiliation

Duration

Status of Project

1.                    

Computer Aided Analysis, Charecterization, Optimization and Simulation of Bio-Molecules of Field Effect Biosensors

Jagriti Mishra
B. Tech, BITS Meshra
(ENGS1368)

May-July2010

Completed

2.                    

Analytical modeling and Simulation of Short Channel Effects and Quantum-Confinement Effects in Silicon Nanowire MOSFET

 

Gaurav Mahajan
B.E. (Hons.) Electrical and Electronics Engineering
Birla Institute of Technology and Science, Pilani (ENGS2982)

May-July2010

Completed

Currently studying MS in Electrical Engineering at Stanford University, USA

3.                    

Analytical modeling and Simulation of Germanium on Insulator MOSFET for Optical Application

Neha Bhushan
KIIT University, Bhubaneswar(ENGS2269)

May-July2011

TCS Hyderabad

4.                    

Analytical modeling and simulation of Tunnel FET for Sensor application

K V Sasidhar Reddy
NIT, Warangal, (ENGS4147)

May-July2011

Management Trainee

RINL, VIZAG-Steel

5.                    

Modeling and Application of Gate Material Engineered Double Gate Junction-Less Field Effect Transistor for Low-Voltage Low-Power Analog and Digital Circuits

 

Neel Modi
(ENGS7096), Electronics and Communication Engineering
Sardar Vallabhbhai National Institute of Technology (SVNIT), Surat

May-July2013

Completed

6.                    

Logic Circuit design analysis and performance comparison of CMOS with Steep Subthreshold Devices,

Pranav P Nair, (ENGS 5351)
B. Tech III Year, Electrical Engineering, IIT Indore, India

May-July2013

Completed

7.                  

Modeling and Simulation of Nanoscale Multi-Gate MOSFET architectures for Digital and Analog Applications

I. Aravindan, ENGS 3571
B.Tech Electronics and Communication Engineering (III Year)
Amrita Vishwa Vidyapeetham, Coimbatore, Tamil Nadu

May-July2014

Completed

8.                    

Modeling of Tapered Gate Electrode Reconfigurable Double Gate MOSFET incorporating Friging Field Effects

Gokulnath R. ENGS 3099
B.E.III Year, Electrical and Electronics Engineering
Sri Sai Ram Engineering College, Chennai-44

May-July2015

Completed

9.                    

Novel Attributes of Tunnel Field Effect Transistors over conventional FET based devices

Sakshi Gupta, ENGS 6707
Electronics and Communication Engineering
ITM University, Gurgaon, Haryana

May-July2015

Completed

10.                

Impact of Gate Underlap Region on the Electrostatistics of FINFET Architecture using Efficient 3D Analytical Model

Sharmetha K., ENGS 9097
Electronics and Communication Engineering,
K.S.Rangaswamy College of Technology, Namakkal, Tamil Nadu, India

May-July2015

Completed

11.                

Modeling and Simulation of FINFET and its circuit applications

Prabhleen Singh, ENGS1202
B. Tech IIIrd Year, Department of Electronics
Electronics and Communication Engineering
Jaypee Institute of Information Technology, Noida-201307

June-August2016

Completed

12.                

Modeling and Simulation of Channel Engineered Double Gate Junction Less Field Effect Transistor DG-JLFET

Mr. Ayush Kumar, ENGS3866
B-305, Neelkanth Boys Hostel, NIT Hamirpur, Hamirpur 177 005

June-August2016

Completed

13.                

Analysis of GATE Engineered Double Gate Junctionless Field effect Transistor for Optical Detection

Mr. Abhineet Sharan, (ENGS 5560)
B. Tech Electronics and Communication Engineering,
PDPM Indian Institiute of Information Technology
Design and Manufactring, Jabalpur

May-July 2017

Completed

14.                

Analytical Modelling and Simulation Study of Homo and Hetero III-V Semiconductor Based Tunnel Field Transistor (TFET)

Ms. Lakshmi Varshika M,
B. E. Hons. 3rd Year,
Department of Electrical and Electronics
Birla Institute of Technology and Science, Pilani
Hyderabad

May-July 2017

Completed

15.                

Studying Novel attributes of Drain Region Extensions and Source Region Tunnelling in a single device for SoC applications

Ms. Hasti Kasundra, ENGS 6742
Electronics and Communication Engineering
SVNIT, Surat, Gujrat 395007

May-July 2018

Completed

16.                

Investigation of Electrical Characteristics of Multi Gate AlGaN/ GaN HEMT

Khushwant Sehra, ENGS290
M. Tech Electronics and Communication Engineering
University School of Information, Communication & Technology
Guru Gobind Singh Indraprastha University

May-July 2018

Completed

17.                

Analytical Modeling and Simulation of Steep Subthreshold Hono/Heterojunction Tunnel FET and its optical applications

Brahmadutta Dixit, FENGS 118
Electronics and Communication Engineering
Mizoram University, Aizawl, Mizoram 796004

May-July 2018

Completed

18 TCAD Basd Assessment of Advanced AlGaN/GaN HEMT with AlN Cap Layer
Ms Shreyasi Das, ENGS3771
University of Calcutta, Kolkata
 
May-July 2019 Completed
19
Modelling and Simulation based Investigation of Ferroelectric DG-MOSFETs and DG-TFETs for switching applications and circuit design
 
Ms Reshma S Kumar, ENGS3045
Delhi Technological University, New Delhi
 
May-July 2019 Completed
20 Modeling and Simulation Study of Different FET and TFET Architectures for Bio-sensing and Gas-sensing Applications
Ms Shrabasti Mondal, ENGS2999
National Institute of Technology, Durgapur
 
May-July 2019 Completed
21 Modelling and Simulation of Asymmetric Gate AlGaN/GaN HEMT using ADS and TCAD
Ms Amrutamayee Nayak, ENGS4992
National Institute of Science & Technology, Berhampur
 
May-July 2019 Completed
22 TCAD Based Investigation of Multichannel AlGaN/GaN HEMT
Ms. Shreyasi Das, ENGS159
University of Calcutta, Kolkata
May-July 2020 Completed
23 TCAD Investigation of Recessed Buffer High Electron Mobility Transistors
Mr. Anandhu Unnikrishnan ENGS5178
2nd year, Department of Electrical and Electronics Engineering, 
NIT Tiruchirappalli, Tamil Nadu
May-July 2020 Completed
24 TCAD Investigation of Radiation Effects on Line TFET and MOSFET
Mr. Vyom Garg, ENGS4596
Electronics & Communication Engineering, Delhi Technological University, New Delhi-110042                                                                                              
May-July 2020 Completed
25 TCAD Based Investigation of Heterojunction Line Tunnel FET
Mr Arindam Paul, ENGS809
B.Tech Electronics and Telecommunication, Indian Institute of Engineering Science and Technology Shibpur, Howrah, West Bengal,711103.
May-July 2020 Completed
26 TCAD Investigation of Buffer-free High Electron Mobility Transistors
Ms Samriddhi Prabhakar Raut ENGS1624
B. Tech ECE - 5th Semester, Maharaja Surajmal Institute of Technology, New Delhi - 110058
May-July 2020 Completed
27 TCAD Investigation of FeFET Devices
Arpan De, ENGS165
Department of Electronics and Telecommunication,
Jadavpur University, Kolkata-700032
May-October 2021 Completed
28 TCAD Investigation of AlGaN/GaN HEMTs for Parameter Extraction and Model Development
 Mr Jeffin Shibu, ENGS972
Indian Institute of Technology, Palakkad
May-October 2021 Completed

At College Level

Under Graduate Students (As Guide):   09

S. No.

Title

Candidate’s name and Affiliation

Year

  1.  

Implementation of a Nanoelectronic Full Adder and Nano-circuit to control millimeter scale walking robot

Sumit Jain, B. Sc. (H) Computer Science- Sixth Semester
Deen Dayal Upadhyaya College, University of Delhi

2007

  1.  

HeRMES: High-Performance Reliable MRAM-Enabled Storage and On-chip MRAM as a High-Bandwidth, Low-Latency Replacement for DRAM Physical Memories

Angad Singh, B. Sc. (H) Computer Science- Sixth Semester
Deen Dayal Upadhyaya College, University of Delhi

2007

  1.  

Banked Microarchitectures for Complexity-Effective Superscalar Microprocessors

Gaurav Arora, B. Sc. (H) Computer Science- Sixth Semester
Deen Dayal Upadhyaya College, University of Delhi

2007

  1.  

Handwriting Recognition Using

Artificial Neural Networks

Sagar Rangra, B. Sc. (H) Computer Science- Sixth Semester
Deen Dayal Upadhyaya College, University of Delhi

2008

  1.  

Data And Picture Encryption Using Image Processing

Ankit Bhatia, B. Sc. (H) Computer Science- Sixth Semester
Deen Dayal Upadhyaya College, University of Delhi

2008

  1.  

Pattern Recognition

Preeti Duhan, B. Sc. (H) Computer Science- Sixth Semester
Deen Dayal Upadhyaya College, University of Delhi

2008

  1.  

Expert System Architecture

Garima Arora, B. Sc. (H) Computer Science- Sixth Semester
Deen Dayal Upadhyaya College, University of Delhi

2008

  1.  

Neural Networks

Saarthak Shandilya, B. Sc. (H) Computer Science- Sixth Semester
Deen Dayal Upadhyaya College, University of Delhi

2008

  1.  

Survivability on unbounded networks

Ashish Arora, B. Sc. (H) Computer Science- Sixth Semester
Deen Dayal Upadhyaya College, University of Delhi

2008

 

Publications Profile
 
Publication Details (as on September 30, 2021)  
Papers in Scopus Indexed International Refereed Journals 104
Full Papers in Scopus Indexed Conference Proceedings 89
IEEE Distinguished Lectures 30
Full Papers in National Conference Proceedings 028
Abstracts in International Conferences 053
Abstracts in National Conferences 004
 
ORCID Webpage              : http://orcid.org/0000-0002-9368-4194             
ResearcherID-Thomson Reuters : http://www.researcherid.com/rid/K-3863-2015

Research Papers published in Scopus Indexed Journals and Conference Proceedings - For details visit http://www.scopus.com/authid/detail.url?authorId=35480023200

As IEEE Distinguished Lecturer delivered 30+ talks on the fllowing topics - 

  • Dielectric Pocket MOSFET: A Novel Device Architecture;
  • Embedded Insulator based Novel Nanoscaled Novel MOSFET Structures
  • Tunnel Field Effect Transistor and its Application as Highly Sensitive and Fast Biosensor 
  • Modeling and Simulation of Tunnel Field Effect Transistor Dual Material Junctionless Double Gate Transistor for Analog and Digital Performance
  • Optimization of Asymmetric (Pi)π-Gate HEMT for Improved Reliability & Frequency Applications

Other publications (Edited works, Book reviews, Festschrift volumes, etc.)

  1. Member - Editorial Board - Proceedings of 16th Asia Pacific Microwave Conference 2004, Department of Electronic Science, University of Delhi, Allied Publishers Pvt. Ltd. 2004, ISBN 81-7764-722-9.
  2. Proceeding Editor - National Conference on Mathematical Techniques: Emerging Paradigms for Electronics and IT Industries (MATEIT-2006) from 22nd March – 25th March 2006, Deen Dayal Upadhyaya College, University of Delhi, Shivaji Marg, New Delhi, India, ISBN: 81-8424-026-0
  3. E-Proceeding Editor - National Conference on Mathematical Techniques: Emerging Paradigms for Electronics and IT Industries (MATEIT-2008) from 26th September – 28th September 2008, Deen Dayal Upadhyaya College, University of Delhi, Shivaji Marg, New Delhi, India
  4. Editor – Proceeding of the International Symposium on Microwave and Optical Technology (ISMOT)-2009, December 16-19, 2009.
  5. Proceeding Editor - Third National Conference on Mathematical Techniques: Emerging Paradigms for Electronics and IT Industries (MATEIT-2010) held during January 30-31, 2010, Deen Dayal Upadhyaya College, University of Delhi, Shivaji Marg, New Delhi, India, sponsored By University Grants Commission (UGC), Govt. of India

Book

  • “Information Technology”, D. V. Singh, Shailender Kumar, Neeraj Tyagi, Pankaj Tyagi, Sanjeev Singh, Manoj Saxena and Ranjan Kumar, Universities Press, ISBN 9788173719004 (2013)

Book Chapter

  • MOSFET Modeling, R. S. Gupta, Mridula Gupta and Manoj Saxena, Encyclopedia of RF and Microwave Engineering, John-Wiley & Sons, Inc. New Jersey, USA, March 2005, pp. 3278-3317, ISBN: 0-471-27053-9.

Abstracts in International Conferences

  1. HEMGAS: A Novel Gate Workfunction Engineered Stacked Gate Oxide Concept for Sub-50 nm DG-MOSFET, Manoj Saxena, Subhasis Haldar, Mridula Gupta, and R. S. Gupta, 2nd International conference on Computer and Devices for communications, CODEC-2004, January 1-3, 2004 in Calcutta, India, pp. 155
  2. Dual-Material Gate Asymmetric Oxide (DMGASYMOX) Stack MOSFET: A Novel Device Architecture for Improved Carrier Transport Efficiency and Reduced Hot Electron Effects, Kirti Goel, Manoj Saxena, Mridula Gupta, R. S. Gupta International Union of Radio Science (URSI), New Delhi, India, October 23-29, 2005.
  3. Dual Material Gate (DMG) SOI-MOSFET with Dielectric Pockets: Innovative Sub-50 nm design for improved switching performance, Ravneet Kaur, Rishu Chaujar, Manoj Saxena and R.S. Gupta, Indo-Australian Symposium on Multifunctional Nanomaterials, Nanostructures and Applications (MNNA 2007) December 19 –21, 2007, Department of Physics & Astrophysics, University of Delhi, Delhi, pp. 109
  4. Two-Dimensional Analytical Modeling and Simulation of Rectangular Gate Recessed Channel (RG-RC) Nanoscale MOSFET in Sub-50nm Regime, Rishu Chaujar, Ravneet Kaur, Manoj Saxena, Mridula Gupta and R.S. Gupta, Indo-Australian Symposium on Multifunctional Nanomaterials, Nanostructures and Applications (MNNA 2007) December 19 –21, 2007, Department of Physics & Astrophysics, University of Delhi, Delhi, pp. 110.
  5. TCAD investigation of a Novel MOSFET architecure of DMG ISE SON MOSFETs for ULSI era, Ravneet Kaur, Rishu Chaujar, Manoj Saxena and R.S. Gupta, Mini-Colloquia on Compact Modeling of advance MOSFET structures and mixed mode applications on January 5-6, 2008 at University of Delhi South Campus, New Delhi, India sponsored by the IEEE Electron Device Society under its Distinguished Lecturer Program, pp. 18-19
  6. Analytical analysis of subthreshold performance of sub-100 nm advanced MOSFET structures – An iterative approach, Ravneet Kaur, Rishu Chaujar, Manoj Saxena and R.S. Gupta, Mini-Colloquia on Compact Modeling of advance MOSFET structures and mixed mode applications on January 5-6, 2008 at University of Delhi South Campus, New Delhi, India sponsored by the IEEE Electron Device Society under its Distinguished Lecturer Program, pp. 20-21
  7. Modeling and 2-D simulation of Nanoscale SON MOSFET, Poonam Kasturi, Manoj Saxena, Mridula Gupta and R.S. Gupta, Mini-Colloquia on Compact Modeling of advance MOSFET structures and mixed mode applications on January 5-6, 2008 at University of Delhi South Campus, New Delhi, India sponsored by the IEEE Electron Device Society under its Distinguished Lecturer Program, pp. 22-24
  8. Performance advantage of air as buried dielectric in sub-100 nm silicon-on-nothing (SON) MOSFET with gate stack architecture, Poonam Kasturi, Manoj Saxena, Mridula Gupta and R.S. Gupta, Mini-Colloquia on Compact Modeling of advance MOSFET structures and mixed mode applications on January 5-6, 2008 at University of Delhi South Campus, New Delhi, India sponsored by the IEEE Electron Device Society under its Distinguished Lecturer Program, pp. 25-26
  9. Sub-threshold drain current performance assessment of MLGEWE-RC MOSFET for CMOS technology, Rishu Chaujar, Ravneet Kaur, Manoj Saxena, Mridula Gupta and R.S. Gupta, Mini-Colloquia on Compact Modeling of advance MOSFET structures and mixed mode applications on January 5-6, 2008 at University of Delhi South Campus, New Delhi, India sponsored by the IEEE Electron Device Society under its Distinguished Lecturer Program, pp. 27-28
  10. RF performance assessment of L-DUMGAC MOSFET for furure CMOS technology in gigahertz regime, Rishu Chaujar, Ravneet Kaur, Manoj Saxena, Mridula Gupta and R.S. Gupta, Mini-Colloquia on Compact Modeling of advance MOSFET structures and mixed mode applications on January 5-6, 2008 at University of Delhi South Campus, New Delhi, India sponsored by the IEEE Electron Device Society under its Distinguished Lecturer Program, pp. 29-30
  11. A Unified Two Dimensional Analytical Model of  optically Controlled Silicon On  Insulator  MESFET ( OPSOI ) for advanced channel materials, Rajni Gautam, Manoj Saxena, R.S. Gupta and Mridula Gupta, The International Conference on Fiber Optics and Photonics – PHOTONICS, December 11-15,2010, IIT Guwahati 
  12. A 2-D Subthreshold Analytical model for Short Channel Effects in Nanowire MOSFETs (Si, Ge), Gaurav Mahajan, Rakhi Narang, Manoj Saxena, V.K. Chaubey, Nirma University International Conference on Engineering (NUiCONE) 2010, December 09-11, 2010, Nirma University, Ahmedabad
  13. Fabrication and Time degradation study of mercuric iodide (Red) single crystal X-Ray detector, Kulvinder Singh and Manoj Saxena, International Symposium on Semiconductor Materials and Devices (ISSMD), M. S. University Vadodara, Gujarat, January 28-30, 2011 
  14. Immunity Against Temperature Variability and Bias Point Invariability in Double Gate Tunnel Field Effect Transistor, Rakhi Narang, Manoj Saxena, R. S. Gupta and Mridula Gupta, International Conference on Materials for Advance Technologies, (ICMAT 2011), June 26, 2011 – July 01, 2011, Singapore(ABSTRACT appeared in Proceedings)
  15. SiGe Metal Semiconductor Field Effect Transistor (MESFET) Photodectetor Having Tailorable Photoresponse Using Bandgap Engineering, Rajni Gautam, Manoj Saxena, R. S. Gupta and Mridula Gupta, International Conference on Materials for Advance Technologies, (ICMAT 2011), June 26, 2011 – July 01, 2011, Singapore (ABSTRACT appeared in Proceedings)
  16. Simulation Study of Insulated Shallow Extension Silicon On Nothing (ISESON) MOSFET for High Temperature Applications, Vandana Kumari, Manoj Saxena, R. S. Gupta and Mridula Gupta, International Conference on Materials for Advance Technologies, (ICMAT 2011), June 26, 2011 – July 01, 2011, Singapore(ABSTRACT appeared in Proceedings)
  17. Nanoscale Double Gate Silicon On Nothing (DGSON) MOSFET: Promising Device Design for Wide Range of Operating Temperatures, Vandana Kumari, Manoj Saxena, Mridula Gupta and R. S. Gupta, International Conference on Latest Trends in Nanoscience and Nanotechnology (ICNSNT), 28th -29th  March 2011, Karnataka, India
  18. Impact of a low bandgap material on the Linearity of a DG-TFET: A Comparative Study, Rakhi Narang, Manoj Saxena, Mridula Gupta and R. S. Gupta, International Conference on Latest Trends in Nanoscience and Nanotechnology (ICNSNT), 28th -29th  March 2011, Karnataka, India
  19. Study of Performance Degradation of the Nanoscale Cylindrical Surrounding Gate MOSFET due to Hot Carrier Induced Localized Charges, Rajni Gautam, Manoj Saxena, Mridula Gupta and R. S. Gupta, International Conference on Latest Trends in Nanoscience and Nanotechnology (ICNSNT), 28th -29th  March 2011, Karnataka, India
  20. High Sensitivity Photodetector Using Si/Ge/GaAs Metal Semiconductor Field Effect Transistor (MESFET), Rajni Gautam, Manoj Saxena, R. S. Gupta and Mridula Gupta, OPTICS 2011, May 23-25, 2011, Calicut, Kerala, India 
  21. Effect of Temperature and Gate Stack on the Linearity and Analog Performance of Double Gate Tunnel FET, Rakhi Narang, Manoj Saxena, R. S. Gupta and Mridula Gupta, The Second International Workshop on VLSI (VLSI 2011) in conjunction with (NECOM-2011), Venue: The Park Hotels, July 15 ~ 17, 2011, Chennai, India. 
  22. Channel Material Engineered Nanoscale Cylindrical Surrounding Gate MOSFET With Interface Fixed Charges, Rajni Gautam, Manoj Saxena, R. S. Gupta and Mridula Gupta, The Second International Workshop on VLSI (VLSI 2011) in conjunction with (NECOM-2011), Venue: The Park Hotels, July 15 ~ 17, 2011, Chennai, India.
  23. Drain Current Model of Nanoscale Dual Material Gate (DMG) MOSFET including interfacial hot-carrier-induced degradation effect", Mini, Vandana Kumai, Manoj Saxena, R. S. Gupta and Mridula Gupta, International Conference on Microwaves, Antenna, Propagation and Remote Sensing, ICMARS-2011, Jaipur, India
  24. Influence of Localised charges on the temperature sensitivity of Si nanowire MOSFET, Rajni Gautam, Manoj Saxena, R. S. Gupta and Mridula Gupta, XVI International Workshop on the Physics of Semiconductor Devices, IWPSD 2011, December 19-22, 2011, IIT Kanpur
  25. Temperature Dependent RF/microwave Characteristics of Nanowire Surrounding Gate MOSFET with Localised Charges, Rajni Gautam, Manoj Saxena, R. S. Gupta and Mridula Gupta,  International Conference on Nanoscience and Technology (ICONSAT – 2012), January 20 to 23, 2012 at Hyderabad, India.
  26. Dynamic Performance Comparison of p-i-n and p-n-p-n Tunnel Field Effect Transistor and Impact of Gate Drain underlap , Rakhi Narang, Manoj Saxena, R. S. Gupta and Mridula Gupta,  International Conference on Nanoscience and Technology (ICONSAT – 2012), January 20 to 23, 2012 at Hyderabad, India.
  27. Nano-scale Empty Space in Double Gate (ESDG) MOSFET for High Performance Digital Applications: A Theoretical Study, Vandana Kumari, Manoj Saxena, R. S. Gupta and Mridula Gupta,  International Conference on Nanoscience and Technology (ICONSAT – 2012), January 20 to 23, 2012 at Hyderabad, India. 
  28. Impact of temperature variations on the device and circuit performance of Tunnel FET - A Simulation Study, Rakhi Narang, Manoj Saxena, R. S. Gupta and Mridula Gupta, NANOCON 2012 – Second International Conference on Nanotechnology - Innovative Materials, Processes, Products and Applications  during October 18-19 2012, at Bharati Vidyapeeth University, Pune, India, pp.99 
  29. Comparative Study of Silicon On Nothing and III-V On Nothing Architecture for High Speed and Low Power Analog and RF/Digital Applications, Vandana Kumari, Manoj Saxena, R. S. Gupta and Mridula Gupta, NANOCON 2012 – Second International Conference on Nanotechnology - Innovative Materials, Processes, Products and Applications  during October 18-19 2012, at Bharati Vidyapeeth University, Pune, India, pp.105 
  30. Gate All Around MOSFET with Catalytic Metal Gate for Gas Sensinga Applications, Rajni Gautam, Manoj Saxena, R. S. Gupta and Mridula Gupta, NANOCON 2012 – Second International Conference on Nanotechnology - Innovative Materials, Processes, Products and Applications  during October 18-19 2012, at Bharati Vidyapeeth University, Pune, India, pp.106 
  31. Drain Current Model for Hetero-Dielectric based TFET Architectures: Accumulation to Inversion Mode Analysis , Upasana, Rakhi Narang, Manoj Saxena and Mridula Gupta, NANOCON 2014 – Third International Conference on Nanotechnology during October 14-15, 2014 organized by Bharati Vidyapeeth University, Pune, India at  Le-Meridien Hotel, Pune  
  32. Modeling and Simulation of Nanoscale Lateral Gaussian Doped Channel Asymmetric Double Gate MOSFET, Vandana Kumari, Manoj Saxena, Mridula Gupta, NANOCON 2014 – Third International Conference on Nanotechnology during October 14-15, 2014 organized by Bharati Vidyapeeth University, Pune, India at  Le-Meridien Hotel, Pune 
  33. pH sensing Characteristics of Silicon on Insulator (SOI) Junctionless (JL) ISFET, Ajay, Rakhi Narang, Manoj Saxena and Mridula Gupta, NANOCON 2014 – Third International Conference on Nanotechnology during October 14-15, 2014 organized by Bharati Vidyapeeth University, Pune, India at  Le-Meridien Hotel, Pune 
  34. TCAD Assessment of Nanoscale Double Gate RingFET (DG-RingFET) Architecture: Analog and Linearity Performance Investigation for RFIC Design , Sachin Kumar, Vandana Kumari, Manoj Saxena, Mridula Gupta, NANOCON 2014 – Third International Conference on Nanotechnology during October 14-15, 2014 organized by Bharati Vidyapeeth University, Pune, India at  Le-Meridien Hotel, Pune 
  35. Numerical Analysis of Variability effects in Nanogap Embedded Dielectric Modulated Field Effect Transistor, Rakhi Narang, Manoj Saxena and Mridula Gupta, NANOCON 2014 – Third International Conference on Nanotechnology during October 14-15, 2014 organized by Bharati Vidyapeeth University, Pune, India at  Le-Meridien Hotel, Pune
  36. Linearity and analog performance realization of energy efficient TFET based architectures: An Optimization for RFIC Design, Upasana, Rakhi Narang, Manoj Saxena and Mridula Gupta, International Conference on Emerging Electronics (ICEE) held at J N Tata Auditorium, Indian Institute of Science during December 4-6, 2014
  37. Modeling and Simulation of  Nanoscale III-V based Tri Gate Stack MOSFET on Nothing for Improved Analog and Digital Applications, Vandana Kumari, Manoj Saxena, Mridula Gupta, International Conference on Recent Advances in Nanoscience and Nanotechnology (ICRANN-2014), Jawahar Lal Nehru University, New Delhi held during December 15-16, 2014
  38. Dielectric Pocket Tunnel FET: A Reliable Alternative, Upasana, Rakhi Narang, Manoj Saxena and Mridula Gupta, International Conference on Recent Advances in Nanoscience and Nanotechnology (ICRANN-2014), Jawahar Lal Nehru University, New Delhi held during December 15-16, 2014
  39. Analysis of Cylindrical Gate Junctionless Tunnel Field Effect Transistor (CG-JL-TFET), Ajay, Rakhi Narang, Manoj Saxena and Mridula Gupta,  12th IEEE India International Conference, INDICON 2015, on Electronics, Energy, Environment, Communication, Computer, Control, (E3-C3) held during December 17-20, 2015 at Jamia Millia Islamia, New Delhi, India (Received Best Paper Award) (Presented)
  40. Merits of designing  Tunnel Field Effect Transistors with Underlap near Drain region, Upasana, Rakhi Narang, Manoj Saxena and Mridula Gupta, 12th IEEE India International Conference, INDICON 2015, on Electronics, Energy, Environment, Communication, Computer, Control, (E3-C3) Held during December 17-20, 2015 at Jamia Millia Islamia, New Delhi, India (Presented)
  41. Investigation of III-V Compound Semiconductor Materials on Analog performance of Nanoscale RingFET, Sachin Kumar, Vandana Kumari, Manoj Saxena, Mridula Gupta, 12th IEEE India International Conference, INDICON 2015, on Electronics, Energy, Environment, Communication, Computer, Control, (E3-C3) held during December 17-20, 2015 at Jamia Millia Islamia, New Delhi, India
  42. Study of Gate Underlap Dielectric Modulated Double Gate Junctionless MOSFET as a Biosensor, Ajay, Rakhi Narang, Manoj Saxena and Mridula Gupta, 18th International Workshop on Physics of Semiconductor Devices (IWPSD 2015) held during December 7-10, 2015 at INDIAN INSTITUTE OF SCIENCE,  Bangalore, India.
  43. Physical Insights into Double Gate (DG) p-i-n TFET Operating States: Modeling and Simulation Study, Upasana, Sakshi Gupta, Rakhi Narang, Manoj Saxena and Mridula Gupta, 18th International Workshop on Physics of Semiconductor Devices (IWPSD 2015) held during December 7-10, 2015 at INDIAN INSTITUTE OF SCIENCE,  Bangalore, India.
  44. Analysis of Gate Underlap Channel Junctionless Double Gate MOSFET as a Sensor, Ajay, Rakhi Narang, Manoj Saxena and Mridula Gupta, 6th International Conference on Computers and Devices for Communication (CODEC-15) held at Swissotel Kolkata, India during December 16-18,2015.
  45. Modeling and Simulation Study of Short Gate  TFET Architecture Considering the Impact of Mobile Charge Carriers, Understanding Device Physics in Different Operational Regimes, Upasana, Rakhi Narang, Manoj Saxena and Mridula Gupta, 6th International Conference on Computers and Devices for Communication (CODEC-15) held at Swissotel Kolkata, India during December 16-18,2015.
  46. Modeling the Impact of Gate Misalignment in Tunnel Field Effect Transistors" authored by Upasana, Sakshi Gupta, Rakhi Narang, Manoj Saxena and Mridula Gupta, International Conference on Microelectronics Devices, Circuits and Systems (ICMDCS 2017) held at the VIT University, Vellore India from 10th to 12th August 2017
  47. Analytical Modeling and Simulation study of Homo and Hetero III-V Semiconductor based Tunnel Field Effect Transistor, M. Lakshmi Varshika, Rakhi Narang, and Manoj Saxena, accepted in XIX International Workshop on The Physics of Semiconductor Devices (IWPSD 2017) jointly organized by Solid State Physics Laboratory and Indian Institute of Technology Delhi in collaboration with Society for Semiconductor Devices and in association with Jamia Millia Islamia Delhi University, Semiconductor Society (INDIA) and Society for Information Display (SID) to be held during December 11-15,2017 at IIT Delhi.
  48. Study of Extended Back Gate Double Gate JunctionLess Transistor: Theoretical and Numerical Investigation, Vandana Kumari, Abhineet Sharan Manoj Saxena, Mridula Gupta, accepted in XIX International Workshop on The Physics of Semiconductor Devices (IWPSD 2017) jointly organized by Solid State Physics Laboratory and Indian Institute of Technology Delhi in collaboration with Society for Semiconductor Devices and in association with Jamia Millia Islamia Delhi University, Semiconductor Society (INDIA) and Society for Information Display (SID) to be held during December 11-15,2017 at IIT Delhi.
  49. Analytical Model for Tapered Gate Electrode Double Gate MOSFET Incorporating Fringing Field Effects, Rakhi Narang, Gokulnath R, Mridula Gupta, and Manoj Saxena, accepted in XIX International Workshop on The Physics of Semiconductor Devices (IWPSD 2017) jointly organized by Solid State Physics Laboratory and Indian Institute of Technology Delhi in collaboration with Society for Semiconductor Devices and in association with Jamia Millia Islamia Delhi University, Semiconductor Society (INDIA) and Society for Information Display (SID) to be held during December 11-15,2017 at IIT Delhi.
  50. Investigation of sensitivity of Gate Underlap Junctionless DG MOSFET for Biomolecules, Ajay, Rakhi Narang, Manoj Saxena and Mridula Gupta accepted in XIX International Workshop on The Physics of Semiconductor Devices (IWPSD 2017) jointly organized by Solid State Physics Laboratory and Indian Institute of Technology Delhi in collaboration with Society for Semiconductor Devices and in association with Jamia Millia Islamia Delhi University, Semiconductor Society (INDIA) and Society for Information Display (SID) to be held during December 11-15,2017 at IIT Delhi.
  51. Floating Gate Junction-less Double Gate Radiation Sensitive Field Effect Transistor (RADFET) Dosimeter: A Simulation Study, Avashesh Dubey, Rakhi Narang, Manoj Saxena, and Mridula Gupta, accepted in XIX International Workshop on The Physics of Semiconductor Devices (IWPSD 2017) jointly organized by Solid State Physics Laboratory and Indian Institute of Technology Delhi in collaboration with Society for Semiconductor Devices and in association with Jamia Millia Islamia Delhi University, Semiconductor Society (INDIA) and Society for Information Display (SID) to be held during December 11-15,2017 at IIT Delhi.
  52. Optically Controlled Silicon On Nothing MOSFET-Numerical Simulation, Vandana Kumari, Manoj Saxena, Mridula Gupta accepted in XIX International Workshop on The Physics of Semiconductor Devices (IWPSD 2017) jointly organized by Solid State Physics Laboratory and Indian Institute of Technology Delhi in collaboration with Society for Semiconductor Devices and in association with Jamia Millia Islamia Delhi University, Semiconductor Society (INDIA) and Society for Information Display (SID) to be held during December 11-15,2017 at IIT Delhi.
  53. Simulation Study on Stability aspect of Dual Metal Dual Dielectric based TFET Architectures against Temperature Variations, Upasana, Rakhi Narang, Manoj Saxena, Mridula Gupta accepted in XIX International Workshop on The Physics of Semiconductor Devices (IWPSD 2017) jointly organized by Solid State Physics Laboratory and Indian Institute of Technology Delhi in collaboration with Society for Semiconductor Devices and in association with Jamia Millia Islamia Delhi University, Semiconductor Society (INDIA) and Society for Information Display (SID) to be held during December 11-15,2017 at IIT Delhi.

Paper Published in National conferences: -

  1. Two-Dimensional Analytical Modeling and Simulation of DMG-EPI MOSFET, Kirti Goel, Manoj Saxena, Mridula Gupta and R. S. Gupta, National conference on VLSI Design & Technology, April 12-13, 2004, Bharati Vidyapeeth’s College of Engineering, Paschim Vihar, New Delhi, India.
  2. Two-Dimensional Analytical Modeling and Simulation of a novel structure Triple-Material Gate Stack (TRIMGAS) MOSFET, R. S. Gupta, Kirti Goel, Manoj Saxena and Mridula Gupta, ELECTRO-2005, Emerging Trends in Electronics, BHU, Varanasi, February 3-5, p.134-137, 2005.
  3. Two-Dimensional Analytical Modeling and Simulation of Multiple Material Gate Oxide Stacked MOSFET, R. S. Gupta, Kirti Goel, Manoj Saxena and Mridula Gupta, National Conference on Integrated Broad Band Digital Systems and Networks, NIEC, Delhi, March 18-19, 2005
  4. RF Performance Investigation of Gate Stacked Insulated Shallow Extension (ISE) MOSFET and Bulk: A Comparative Study, Ravneet Kaur, Rishu Chaujar, Manoj Saxena and R. S. Gupta, Proceeding of Mathematical Techniques Emerging Paradigm for Electronics and IT Industries (MATEIT 2006), pp 254-258
  5. Design and FPGA realization of Direct Sequence-Spread Spectrum (DS-SS) BPSK Modulator using a Five Stage Gold Code Generator, Rishu Chaujar, Ravneet Kaur, Manoj Saxena and R. S. Gupta, Proceeding of Mathematical Techniques Emerging Paradigm for Electronics and IT Industries (MATEIT 2006), pp 213-216.
  6. Scrambled Sequence FPGA based Direct Sequence Spread Spectrum BPSK Modulator: 10 Stage Analysis, Rishu Chaujar, Ravneet Kaur, Manoj Saxena, Mridula Gupta and R. S. Gupta, National Conference on Recent Trends in Electronics and Information Technology, (RTEIT 2006), pp 334-337, 28-29 July 2006, Maharashtra, India.
  7. Exploring the Effect of Negative Junction Depth on Electrical Behaviour of Sub-50-Nanometer Concave DMG MOSFET: A Simulation Study, Rishu Chaujar, Ravneet Kaur, Manoj Saxena, Mridula Gupta and R. S. Gupta, National Conference on Recent Advancement in Microwave Technique and Applications (Microwave-2006), pp. 123-125, 6-8 October 2006, Jaipur, India.
  8. Lateral Channel Engineered Structure- Insulated Shallow Extension (ISE) MOSFET: DC and RF Performance Investigation, Ravneet Kaur, Rishu Chaujar, Manoj Saxena and R. S. Gupta, National Conference on Recent Advancement in Microwave Technique and Applications (Microwave-2006), pp. 119-122, 6-8 October 2006, Jaipur, India.
  9. Effect of transport property on the performance of insulated shallow extension gate stack (ISEGaS) MOSFET, Ravneet Kaur, Rishu Chaujar, Manoj Saxena and R. S. Gupta, Indian microelectronics Society Conference 2007 Theme: Trends in VLSI and Embedded System, pp. 52-57, August 17-18, 2007, Punjab Engineering College, Chandigarh, India
  10. New Concave MOSFET with Transverse Dual Material Gate (T-DMG) in Sub-50nm Regime: A Simulation Study, Rishu Chaujar, Ravneet Kaur, Manoj Saxena, Mridula Gupta and R. S. Gupta, Indian microelectronics Society Conference 2007 Theme: Trends in VLSI and Embedded System, pp. 33-37, August 17-18, 2007, Punjab Engineering College, Chandigarh, India (Best Student Paper Award)
  11. A 2-D Analytical Model for Gate Misalignment Effects on Graded Channel DG FD SOI n-MOSFET, Rupendra Kumar Sharma, Manoj Saxena, Mridula Gupta and R. S. Gupta, Indian microelectronics Society Conference 2007 Theme: Trends in VLSI and Embedded System, August 17-18, 2007, Punjab Engineering College, Chandigarh, India
  12. Development Board-Level Experimentation and Simulation of FPGA based DEBPSK DSSS Modulator: Implementation of 10-Chip Gold Code Sequence Generator, Rishu Chaujar, Ravneet Kaur, Manoj Saxena and R. S. Gupta, Second National Conference on Mathematical Techniques Emerging Paradigm for Electronics and IT Industries (MATEIT 2008) September 26-28, 2008 in New Delhi, India, pp. 255-261.
  13. Simulation of a Novel ISE MOSFET with Gate Stack Configuration, Ravneet Kaur, Rishu Chaujar, Manoj Saxena and R. S. Gupta, Second National Conference on Mathematical Techniques Emerging Paradigm for Electronics and IT Industries (MATEIT 2008) September 26-28, 2008 in New Delhi, India, pp. 291-296.
  14. Solution to CMOS technology for high performance analog applications: GEWE-RC MOSFET , Rishu Chaujar, Ravneet Kaur, Manoj Saxena, Mridula Gupta, R. S. Gupta, 2nd  National Workshop on Advanced Optoelectronic Materials and Devices, AOMD 2008, art. no. 5075707, pp. 201-205.
  15. Effect of temperature variation on various parameters in Insulated Shallow Extension Silicon On Nothing(ISE-SON)MOSFET:A simulation study, Vandana Kumari, Manoj Saxena, R. S. Gupta and Mridula Gupta, National Conference and Workshop on Recent Advances in Modern Communication Systems and Nanotechnology (NCMCN – 2011), January, 06-08, 2011
  16. Performance Comparison of Silicon and SiGe based Double Gate Tunneling Field Effect Transistor with gate stack architecture, Rakhi Narang, Manoj Saxena, R. S. Gupta and Mridula Gupta, National Conference and Workshop on Recent Advances in Modern Communication Systems and Nanotechnology (NCMCN – 2011), January, 06-08, 2011
  17. Impact of Localised Charges on the performance of the Si Nanowire Surrounding Gate MOSFET, Rajni Gautam, Manoj Saxena, R. S. Gupta and Mridula Gupta, National Conference and Workshop on Recent Advances in Modern Communication Systems and Nanotechnology (NCMCN – 2011), January, 06-08, 2011
  18. Investigation of Linearity Performance of a Double Gate Band to Band Tunnel Field Effect Transistor, Rakhi Narang, Manoj Saxena, R. S. Gupta and Mridula Gupta, 15th VLSI Design and Test Symposium, July 7-9, 2011, Wipro Technologies, Pune, India
  19. Analog Performance of Insulated Shallow Extension Silicon On Nothing (ISE-SON) MOSFET: Simulation study, Vandana Kumari, Manoj Saxena, R. S. Gupta and Mridula Gupta, 15th VLSI Design and Test Symposium, July 7-9, 2011, Wipro Technologies, Pune, India
  20. A Wide Temperature Range ( 50-500K ) Analysis For Nanoscale Surrounding Cylindrical Gate MOSFET With Localised Charges, Rajni Gautam, Manoj Saxena, R. S. Gupta and Mridula Gupta, 15th VLSI Design and Test Symposium, July 7-9, 2011, Wipro Technologies, Pune, India
  21. Modeling and Simulation of Dielectric Pocket Silicon On Nothing (DiPSON) MOSFET, Neha Bhushan and Manoj Saxena, 99th  Indian Science Congress held at KIIT University, Bhubneswar during Jan 03 – 07, 2012
  22. Impact of Insulating Layers on Single and Double Gate MOSFET for Improved Short Channel Effect and Hot Carrier Reliability , Vandana Kumari, Manoj Saxena, R. S. Gupta and Mridula Gupta, First National Conference on Recent Developments in Electronics (NCRDE 2013), Department of Electronic Science, University of Delhi South Campus, New Delhi during Jan 18-20, 2013
  23. High Performance Low Power 6T RAM Cell Using Gate-All Around (GAA) MOSFET , Rajni Gautam, Manoj Saxena, R. S. Gupta and Mridula Gupta, First National Conference on Recent Developments in Electronics (NCRDE 2013), Department of Electronic Science, University of Delhi South Campus, New Delhi during Jan 18-20, 2013
  24. Performance Investigation of Silicon Nanowire Tunnel FET for Analog and Digital Applications, Rakhi Narang, Manoj Saxena, R. S. Gupta and Mridula Gupta, First National Conference on Recent Developments in Electronics (NCRDE 2013), Department of Electronic Science, University of Delhi South Campus, New Delhi during Jan 18-20, 2013
  25. NI MULTISIM Implementation of Memristor Based Secured Communication System, Khushwant Sehra Poonam Kasturi Mamta Amol Wagh and Manoj Saxena, Proceedings of National Conference on Advancements in Electronics and Computer Applications NCAECA 2016 (UGC and DiETY Sponsored) held during Feb 04-05, 2016 at Shaheed Rajguru College of Applied Sciences, University of Delhi. Pp. 19-24, ISBN 978-93-5254-496-7 published by M/s Paramount Publishing House
  26. Study of Gate and Drain Controllability over Double Gate (DG)Tunnel FETs through Modeling and Simulation, Upasana, Rakhi Narang, Manoj Saxena and Mridula Gupta, Conference Proceedings of Second National Conference on Recent Developments in Electronics (NCRDE-2017), pp. 160-165, ISBN: 978-81- 933475-3- 9
  27. Impact of High-K Gate Dielectric on Double Gate RingFET (HK-DG-RingFET) Architecture, Sachin, Vandana Kumari, , Manoj Saxena and Mridula Gupta, Conference Proceedings of Second National Conference on Recent Developments in Electronics (NCRDE-2017), pp. 177-180, ISBN: 978-81- 933475-3- 9
  28. Two-Dimensional Surface Potential Model for Gate All Around Junctionless Tunnel Field-Effect Transistor, Ajay, rakhi Narang, Manoj Saxena and Mridula Gupta, Conference Proceedings of Second National Conference on Recent Developments in Electronics (NCRDE-2017), pp. 154-159, ISBN: 978-81- 933475-3- 9
     

Abstracts in National Conferences

  1. Generation Of Arbitrary Waves Using Arduino Due, Arun Chahar, Poonam Kasturi and Manoj Saxena , Poster Presentation in THINK NANO 2016 – National Student Symposium organized by Centre for Nano Science and Engineering (CeNSE), Indian Institute of Science, Bangalore held during March 31, 2016 - April 01, 2016 at IISc, Bangalore
  2. Integration of Mem-Element with SCR based Rectifiers, Khushwant Sehra, Gaurav Kumar Shakya, Poonam Kasturi and Manoj Saxena, Poster Presentation in THINK NANO 2016 – National Student Symposium organized by Centre for Nano Science and Engineering (CeNSE), Indian Institute of Science, Bangalore held during March 31, 2016 – April 01, 2016 at IISc, Bangalore
  3. Simulation and Experimental Verification of Memristor Based XOR Gate, Arushi Gupta, Rishav Kumar Pandey, Divya Goel, Poonam Kasturi, Mamta Amol Wagh, Manoj Saxena, Poster Presentation in THINK NANO 2016 – National Student Symposium organized by Centre for Nano Science and Engineering (CeNSE), Indian Institute of Science, Bangalore held during March 31, 2016 – April 01, 2016 at IISc, Bangalore
  4. Smart Traffic System Design Based On PIC Microcontroller, Himanshu Bhardwaj, Samaa Manzoor Wani, Poonam Kasturi  and Manoj Saxena, Poster Presentation in THINK NANO 2016 – National Student Symposium organized by Centre for Nano Science and Engineering (CeNSE), Indian Institute of Science, Bangalore held during March 31, 2016 – April 01, 2016 at IISc, Bangalore
Conference Organization/ Presentations (in the last three years)
Organization of a Conference/ Workshops etc
 
International Events
  • Joint Secretary and Member - Technical Review Committee - 16th Asia-Pacific Microwave Conference (APMC’2004), University of Delhi, December 15 - 18, 2004, New Delhi, India
  • Member - Local organizing committee - India-Japan Workshop (IJW-2006) on ZnO Materials and Devices, December 18-20, 2006 sponsored by DST (New Delhi) - JSPS (Japan) organized by Department of Electronic Science, University of Delhi South Campus
  • Secretary Mini-Colloquia on Compact Modeling of advance MOSFET structures and mixed mode applications on January 5-6, 2008 at University of Delhi South Campus, New Delhi, India sponsored by the IEEE Electron Device Society under its Distinguished Lecturer Program
  • Secretary The 18th WIMNACT(Workshop and IEEE EDS Mini-colloquium on NAnometer CMOS Technology)-New Delhi, India - Mini-Colloquia on Compact Modeling and Fabrication techniques of advance MOSFET/ HEMT structures, June 04-05, 2009 at University of Delhi South Campus, New Delhi, India sponsored by the IEEE Electron Device Society under its Distinguished Lecturer Program
  • Symposium secretary International Symposium on Microwave and Optical Technology (ISMOT)-2009 , December 16-19,2009 in Hotel Ashok, New Delhi, India  
  • Program Committee Member The Seventh International Conference on Distributed Computing and Internet Technology, Bhubaneswar, India, 9 – 12 February 2011
  • Program Committee Member International Conference on Soft Computing for Problem Solving (SoCProS 2011), Roorkee, India, December 16-18, 2011 http://www.mirlabs.net/socpros11/ 
  • Convener Science Academies Lecture Workshop On Frontiers in Science & Engineering - Opportunities for Graduates, February 17-18, 2012, SP Jain Centre Auditorium, University of Delhi South Campus, Benito Juarez Road, Dhaula Kuan, New Delhi
  • Member-Organizing Committee International MOS-AK/GSA (India) workshop,  March 16-17, 2012 in JIIT University, Noida, Uttar Pradesh, India
  • Member Technical Program Committee Seventh International Conference on “Bio-Inspired Computing: Theories and Application, 2012 (BIC-TA 2012)” to be held at ABV-Indian Institute of Information Technology and Management Gwalior during December 14 - 16, 2012. http://www.iiitm.ac.in/bicta2012/
  • Secretary Mini-Colloquia on "Compact Modelling Techniques for Nanoscale Devices and Circuit Analysis” Organized by IEEE EDS-Delhi Chapter, New Delhi, India during March 14-15, 2012 held at SP Jain Centre Auditorium, University of Delhi South Campus, Benito Juarez Road, New Delhi, 110021. The Mini-Colloquia was sponsored by the IEEE Electron Devices Society under its Distinguished Lecturer Program
  • Technical Program Committee Member 10th International Conference on Distributed Computing and Internet Technologies, 6th - 9th February, 2014, Bhubaneswar, Odisha, India.
  • Secretary Mini Colloquia on “Compact Modelling Techniques for Nanoscale Devices and Circuit Analysis” on January 13, 2015, University of Delhi South Campus
  • Member-Technical Program Committee International Conference on 14th -15th Jan, 2016 themed on “Cloud System and Big Data Engineering” at Amity University Uttar Pradesh Noida Campus, http://www.gtie2016.com/committees.html#2  â€‹
  • International Steering Committee Member – 2019 IEEE International Conference on Modeling of System Circuits and Devices (MOS-AK India 2019) organized by joint chapter of CAS/ED Societies IEEE Hyderabad Section, IIT Hyderabad during February 25-27, 2019.
  • Conference Secretary - XVII International Symposium on Microwave and Optical Technology, ISMOT 2020 to be held during December 15-18, 2020 in New Delhi India.

National Events

  1. Member - Organizing Committee National Symposium on recent advances in microwaves and light waves (NSAML’03) University of Delhi South Campus, New Delhi, October 2003.
  2. Treasurer and Member Organizing Committee Short course on Spice Models for Advanced VLSI Circuit Simulation organized by Department of Electronic Science, University of Delhi South Campus, Dec. 11-12, 2005
  3. Secretary and Member-Technical Programme Committee National Conference on Mathematical Techniques: Emerging Paradigms for Electronics and IT Industries (MATEIT-2006) from 22nd March – 25th March 2006, Deen Dayal Upadhyaya College, University of Delhi, Shivaji Marg, New Delhi, India
  4. Co-convener and Secretary - National Conference on Mathematical Techniques: Emerging Paradigms for Electronics and IT Industries (MATEIT-2008) from 26th September – 28th September 2008, Deen Dayal Upadhyaya College, University of Delhi, Shivaji Marg, New Delhi, India
  5. Coordinator - Two-Days Workshop On Quantum Mechanics: Theory and Application during November 21-22, 2008, Organized by Forum for Interdisciplinary Application in Sciences (FiDAS) Deen Dayal Upadhyaya College, University of Delhi, New Delhi Sponsored by Delhi Chapter of the National Academy of Sciences, India.
  6. Co-convener and Secretary - Three days Workshop on Futuristic trends of Quality Control in Information Security Management, Sponsored by CSIR, Govt. of India, October 09-11, 2009 organized by Forum for Interdisciplinary Application in Sciences (FiDAS) Deen Dayal Upadhyaya College, University of Delhi, New Delhi
  7. Member-Organizing Committee National Seminar and Workshop on Integrating Multiple Technologies to Support Teaching and Learning, September 24-26, 2009 organized by Department of Electronics, Maharaja Agarasen College, University of Delhi and sponsored by UGC, Govt. of India
  8. Coordinator - First One-Day National Workshop on Einstein & Special Theory of Relativity, Sponsored By Delhi Chapter-National Academy of Sciences, India, November 06, 2009
  9. Coordinator - Second One-Day National Workshop on Einstein & Special Theory of Relativity, Sponsored By Delhi Chapter-National Academy of Sciences, India, November 07, 2009
  10. Coordinator - Two-Day National Workshop on Fiber Optics and Applications, Sponsored By Delhi Chapter-National Academy of Sciences, India, November 28-29, 2009
  11. Co-convener and Secretary - Third National Conference on Mathematical Techniques: Emerging Paradigms for Electronics and IT Industries (MATEIT-2010) held during January 30-31, 2010, Deen Dayal Upadhyaya College, University of Delhi, Shivaji Marg, New Delhi, India, sponsored By University Grants Commission (UGC), Govt. of India
  12. Convener - First National Workshop On Recent Trends in Semiconductor Devices and Technology, Jointly Organized By Aryabhatta Science Forum, Deen Dayal Upadhyaya College, University of Delhi And IEEE EDS Delhi Chapter, New Delhi, Supported By Integrated Microsystem, Gurgaon, India, Society for Microelectronics and VLSI, New Delhi, February 12-13, 2010
  13. Convener - Second National Workshop On Recent Trends in Semiconductor Devices and Technology, Jointly Organized By FiDAS, Deen Dayal Upadhyaya College, University of Delhi And IEEE EDS Delhi Chapter, New Delhi, Supported By DRDO, Govt of India and Integrated Microsystem, Gurgaon, India held during September 17-18, 2010
  14. Convener - Second National Workshop On Quantum Mechanics: Theory and Application Organized By FiDAS, Deen Dayal Upadhyaya College, University of Delhi, Sponsored By CSIR, Govt of India Supported By IEEE EDS Delhi Chapter, New Delhi and The National Academy of Sciences, India, - Delhi Chapter held during Oct. 22-23, 2010 and October 29-30, 2010
  15. Workshop Coordinator - Three Day Joint Science Academies Lecture Workshop On Frontier in Physics, January 21-23, 2011 jointly Organized by FIDAS, Deen Dayal Upadhyaya College and IEEE EDS Delhi Chapter at SP Jain centre, University of Delhi South Campus, New Delhi
  16. Secretary - First National Workshop On Numerical Methods and Differential Equations in Computational Science (NUMDECS-2011), February 01-05, 2011 Organized by FIDAS, DDU College, Sponsored and Supported by University Grants Commission (UGC), Govt. of India
  17. Member-Organizing Committee NATIONAL SEMINOR ON RECENT ADVANCES IN MICROELECTRONIC DEVICES Organized by Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, Sec-22, Rohini, Delhi-110086 sponsored by Defence Research and Development Organization Ministry of Defence, Government of India.
  18. Convener Science Academies Lecture Workshop On Frontiers in Science & Engineering - Opportunities for Graduates, February 17-18, 2012, SP Jain Centre Auditorium, University of Delhi South Campus, Benito Juarez Road, Dhaula Kuan, New Delhi
  19. Convener Science Academies Lecture Workshop On Joint Academies Lecture Workshop On History, Aspects and Prospects of Electronics in India, October 12-13, 2012,  SP Jain Centre Auditorium, University of Delhi South Campus, Benito Juarez Road, Dhaula Kuan, New Delhi
  20. Convener Lecture Workshop on Trans-disciplinary Areas of Research and Teaching by  Shanti Swaroop Bhatnagar Awardee, February 01-02, 2013 organized by Deen Dayal Upadhyaya College, University of Delhi sponsored by Council of Scientific and Industrial Research (CSIR), New Delhi and supported by IEEE EDS Delhi Chapter
  21. Convener Third National Workshop On Recent Trends in Semiconductor Devices and Technology, January 19-20, 2013 Jointly organized by Deen Dayal Upadhyaya College, University of Delhi and IEEE EDS Delhi Chapter, New Delhi Sponsored By Defence Research and Development Organization (DRDO), Ministry of Defence, Government of India. Venue: SP Jain Centre, University of Delhi South Campus, Benito Juarez Road, Dhaula Kuan, New Delhi
  22. Secretary First National Conference on Recent Developments in Electronics (NCRDE 2013) is being organized by IEEE EDS Delhi Chapter. The conference will be held at Department of Electronic Science, University of Delhi South Campus, New Delhi during Jan 18-20, 2013 
  23. Convener Fourth National Workshop On Recent Trends in Semiconductor Devices and Technology, September 12-13, 2014 organized by Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi Sponsored By Defence Research and Development Organization (DRDO), Ministry of Defence, Government of India. 
  24. Convener On October 17, 2014, One Day Seminar on “Women in Science: A career in Science”, Organized by Silizium-Electronics Society, Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi, supported by IEEE EDS Delhi Chapter and Science Education Panel, Indian Acdemy of Sciences, Bangalore
  25. Convener Second Lecture Workshop on Trans-disciplinary Areas of Research and Teaching by Shanti Swaroop Bhatnagar Awardee, January 30-31, 2015 organized by Deen Dayal Upadhyaya College, University of Delhi sponsored by Council of Scientific and Industrial Research (CSIR), New Delhi and supported by IEEE EDS Delhi Chapter
  26. Convener - One Day Symposium to Celebrate International Year of Light held on October 28, 2015.
  27. Convener - Third Workshop on Quantum Mechanics: Theory and Application during March 13-14, 2016 organized by Silizium-Electronics Society, Deen Dayal Upadhyaya College.
  28. Activities organized as Convener-Science Foundation https://dducollegedu.ac.in/ViewpagePAnel.aspx?MenuId=Q8dDQco9jeHkDT6i1aMwZU9NcU8mu5CI
  29. Activities organized as Program Coordinator-DBT Star College Program https://dducollegedu.ac.in/Viewtopics.aspx?MenuId=OGlqRo1PqJzQF5Yfpvx5Gbc____2OFSeIFK

Participation as Paper/Poster Presenter

  • A 2-D Subthreshold Analytical model for Short Channel Effects in Nanowire MOSFETs (Si, Ge), Gaurav Mahajan, Rakhi Narang, Manoj Saxena, V.K. Chaubey, Nirma University International Conference on Engineering (NUiCONE) 2010, December 09-11, 2010, Nirma University, Ahmedabad
Research Projects (Major Grants/Research Collaboration)
  1. Program Coordinator – DBT Star College worth Rs. 1.04 Crores (2018 - )
  2. Co-Principal Investigator in Contract for Acquisition of Research Services (CARS), DRDO sponsored project entitled “Layout Optimization and Thermal analysis swltchlng applicatlons and LNA Design” 2019-2020 worth Rs. 23 Lakhs (Feb 2019 - )
  3. Co-Principal Investigator in CSIR, Govt. of India sponsored major research project entitled Modelling and Simulation Gate Electrode Engineered  and Dielectric Pocket Steep Threshold swing Device for Low Power Digital Circuit Design and Optical Applications(Letter No. 22(0724)/17/EMR-II dt May 16, 2017) worth Rs. 
  4. Co-Principal Investigator in UGC, Govt. of India sponsored research project entitled Physics Based Modeling and Simulation of Channel Material Engineered Ring FET for Sensing Applications worth Rs. 17,23,000/- On Going - (August 01, 2015 - August 2018)
  5. Principal Investigator in a University of Delhi Sponsored Project under Innovation Project Scheme  entitled “Mathematical Modeling and Simulation of Circular and Non-Circular Gate Geometry Junctionless Nanoscale Transistor and co-integration with Memristor Based Electronic Circuits” worth Rs. 4,00,000/- On Going - (October 01, 2015 – November 2016)
  6. Principal Investigator in a University of Delhi Sposnored Project under Innovation Project Scheme entitled Analytical Modeling, Simulation and Verification of Emerging Nanoscale MULTIGATE Device Structures and Study of Government’s Initiatives for Growth of Electronics In India, Project Code – 202 (2013) worth Rs. 5,50,000/- Completed - (November 2013 – February 2015)
  7. Co-Project Investigator in a DST Sponsored Project entitled Analytical Modelling and Simulation of Sub-100 nm Advance Tunnel FET architecture for RF/ Microwave and Biosensing Applications, (SR/S3/EECE/0062/2012) worth Rs. 31,14,000 Completed - (September 2012 – October 2014)
  8. Co-Project Investigator in a DRDO sponsored Project entitled Analytical Modeling, Simulation and Characterization of Silicon Gate All Around Nanowire MOSFET for ULSI (Ultra Large Scale Integration) Circuit Applications worth Rs. 30,68,000 Completed - (April 2012 – March 2015)
  9. Co-Project Investigator in a DRDO sponsored Project entitled Physics Based Modeling and Simulation of Sub-100 nm recessed channel (RC) and insulated shallow extension (ISE) MOSFET with gate electrode work function engineering structures for high performance applications (ERIP/ER/0803693/M/01/1258) worth Rs. 4.70 lakhs Completed - (October 2010 – July 2012)
  10. Co-Principal Investigator in UGC, Govt. of India sponsored research project entitled Modeling and simulation of Nanoscale Dual Material Gate Insulated Shallow Extension Silicon on Nothing MOSFET for Low voltage low power applications (F. No. 36-258/2008(SR)) worth Rs. 9,22,800  Completed - (May 2009 – April 2012)
  11. Co-Project Investigator in a DRDO sponsored Project entitled Physics Based Modeling Simulation and Electrical Characterization of a Novel Device Architecture: Silicon-On-Nothing MOSFET for Sub-100 nm Device Dimensions (No. ERIP/ER/0303417/M/01) worth Rs. 31.68 Lakhs Completed - (April-2004-December 2007) 
 
Awards and Distinctions
  • Received Smt. Shanti Devi Bhargava Memorial Gold medal for being best candidate in the M. Sc Examination in Electronics in 2000
  • Name appeared in the Golden List of IEEE Transactions on Electron Devices Reviewers for year 2005, 2006, 2008, 2009 and 2010.
  • Received outstanding EDS Volunteer recognition from EDS Chapters in the region in 2012.
  • Received Meritorious Teacher by the Govt. of NCT of Delhi for the Year 2014, based on evaluation comprising of Student Evaluation, Result Evaluation, Self Appraisal and Evaluation by the Principal.  
  • Regional Editor South Asia – IEEE EDS News Letter (2015-2017, 2018-)
  • Senior Member - IEEE
  • IEEE EDS Distinguished Lecturer (2016 - )
  • Fellow IETE (2017 - )
  • Member-EDS Board of Governers, USA (2018-2020)
Association With Professional Bodies

Editing

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Reviewing

  • Reviewer of IEEE Transactions on Electron Devices, Impact factor: 2.704, Electronic ISSN: 1557-9646, Print ISSN: 0018-9383
  • Reviewer of IEEE Transactions on Circuits and Systems I: Regular Papers, Impact factor: 3.934, Electronic ISSN: 1558-0806, Print ISSN: 1549-8328
  • Reviewer of IEEE Transactions on Circuits and Systems II: Express Briefs, Impact factor: 3.25, Electronic ISSN: 1558-3791, Print ISSN: 1549-7747
  • Reviewer of IEEE Electron Device Letters, Impact factor: 3.753, Electronic ISSN: 1558-0563; Print ISSN: 0741-3106
  • Reviewer of IEEE Journal of the Electron Devices Society
  • Reviewer of EEE Access, Impact factor: 4.098, Electronic ISSN: 2169-3536
  • Reviewer of IEEE Transactions on Circuits and Systems I: Regular Papers Impact Factor: 2.823 ISSN: 1549-8328
  • Reviewer of International Journal of Electronics Letters
  • Reviewer of Microelectronics Journal, Impact factor: 1.284, ISSN: 0026-2692
  • Reviewer of IOP Nanotechnology, Impact factor: 3.399, Online ISSN: 1361-6528, Print ISSN: 0957-4484
  • Reviewer of AEU-International Journal of Electronics and Communications, Impact factor: 2.853, ISSN: 1434-8411
  • Reviewer of Journal of Electronic Materials (Springer Journal), Impact Factor: 1.566 (2017), ISSN: 0361-5235 (print version),
  • Reviewer of Materials Science in Semiconductor Processing, Impact factor: 2.722, ISSN: 1369-8001
  • Reviewer of Journal of Physics D: Applied Physics, Institute of Physics (IOP))
  • Reviewer of Semiconductor Science Technology, Impact Factor: 2.654, Online ISSN: 1361-6641, Print ISSN: 0268-1242
  • Reviewer of Measurement Science and Technology (IOP)
  • Reviewer of Solid State Electronics, Elsevier Science, UK
  • Reviewer of Superlattices and Microstructures, Elsevier Science, UK
  • Reviewer of International Journal of Numerical Modelling: Electronic Networks, Devices and Fields (John Wiley & Sons, Ltd.)  Impact factor : 0.795, Online ISSN:1099-1204
  • Reviewer of IET Micro and Nano Letters
  • Reviewer of Journal of Electrical and Electronics Engineering Research (JEEER)
  • Reviewer of Journal of Electrical Engineering & Technology 
  • Reviewer of MAPAN-Journal of Metrology Society of India
  • Reviewer of International Journal of Science and Technology Education Research
  • Reviewer of Computer Communications (Elsevier) , Impact factor: 2.766, ISSN: 0140-3664
  • Reviewer of Journal of Electronic Materials (Springer Journal), ISSN: 0361-5235 (print version), Impact Factor: 1.566 (2017)
  • Reviewer of IET Circuits, Devices & Systems, Impact Factor: 1.277, Online ISSN 1751-8598, Print ISSN 1751-858X
  • Reviewer of International Journal of Electronics and Communications, Impact Factor – 2.115
  • Reviewer of Advances in Condensed Matter Physics, Impact factor: 0.653, ISSN: 1687-8108 (Print), ISSN: 1687-8124 (Online)
  • Reviewer of Microelectronics Reliability ISSN: 0026-2714, Impact Factor – 1.236
  • Reviewer of Turkish Journal of Electrical Engineering & Computer Sciences, Impact factor: N/A, E-ISSN: 1303-6203, ISSN: 1300-0632
  • Reviewer of Microsystem Technologies- Micro- and Nanosystems Information Storage and Processing Systems, ISSN: 0946-7076 (Print) 1432-1858 (Online), Impact Factor-1.581
  • Reviewer of IETE Technical Review
  • Reviewer of Journal of 3D Printing in Medicine
  • Reviewer of International Journal of Electronics
  • Reviewer of International Journal of Electronics
  • Reviewer of Microsystem Technologies

 

  • Reviewer of International Conference - Asia Pacific Microwave Conference (APMC)-2008, 16-19, December 2008 in Hong Kong Convention and Exhibition Center, Hong Kong, China
  • Reviewer of International Conference - International Symposium on Microwave and Optical Technology (ISMOT)-2009,16-19, December 2009 in Hotel Ashok, New Delhi, India
  • Reviewer for Book Proposal for Universities Press (India) Pvt. Ltd. Hyderabad. (2009 - )
  • Reviewer for The 8th International Conference on Computing, Communications and Control Technologies: CCCT 2010, Jointly with The 16th International Conference on Information Systems Analysis and Synthesis: ISAS 2010, In the Context of The International Multi-Conference on Complexity, Informatics and Cybernetics: IMCIC 2010, April 6th - 9th, 2010 Orlando, Florida USA
  • Reviewer of  National Conference on Recent Trends in Exotic materials (NCRTEM 10), Sharda University Greater Noida-201306, U.P., India
  • Reviewer for 7th International Conference on Distributed Computing and Internet Technologies (ICDCIT – 2011), Bhubaneswar during 9 – 12 February 2011.
  • Member-Review Committee - International Conference on Latest Trends in Nanoscience and Nanotechnology (ICNSNT), 28th -29th  March 2011, Karnataka, India
  • Reviewer of The SPRING 9th International Conference on Computing, Communications and Control Technologies: CCCT 2011  Jointly with The 17th International Conference on Information Systems Analysis and Synthesis: ISAS 2011 In the Context of The 2nd International Multi-Conference on Complexity, Informatics and Cybernetics: IMCIC 2011, March 27th - 30th, 2011 ~ Orlando, Florida USA
  • Reviewer for The 4th International Multi-Conference on Engineering and Technological Innovation: IMETI 2011, July 19th - July 22nd, 2011 – Orlando, Florida, USA
  • Reviewer of International Symposium on Models and Modeling Methodologies in Science and Engineering: MMMse 2011  in the context of The 15th World Multi-Conference on Systemics, Cybernetics and Informatics: WMSCI 2011, July 19th - July 22nd, 2011 – Orlando, Florida, USA
  • Program Committee Member - 10th International Conference on Distributed Computing and Internet Technologies, 6th - 9th February, 2014, Bhubaneswar, Odisha, India. http://www.icdcit.ac.in/archive/2014/cfp/CFP-ICDCIT-2014.pdf 
  • Technical Program Committee-21st International Symposium on VLSI Design and Test
  • (VDAT 2017), 29th JUNE - 2nd JULY 2017, IIT Roorkee, INDIAhttps://www.iitr.ac.in/vdat2017/TPC.htm
  • Program Committee Member - 7th International Conference Soft Computing for Problem Solving - SocProS 2017
  • December 23-24, 2017, Indian Institute of Technology Bhubaneswar, Bhubaneswar http://www.socpros17.scrs.in/program-committee.php 
  • Technical Program Committee-twenty-Second International Symposium on VLSI Design and Test (VDAT-2018), Thiagarajar College of Engineering, Madurai, India.  http://vdat2018.tce.edu/technical.php#schedule 
  • Program Committee Member - 8th International Conference Soft Computing for Problem Solving - SocProS 2018, December 17-19, 2018, Vellore Institute of Technology, Tamil Nadu, India http://socpros18.scrs.in/program-committee.php 
  • Program Committee Member – 2018 International Conference on Signal Processing and ommunication, March 21-23, 2018, Jaypee Institute of Information Technology, JIIT Sector - 128, NOIDA—201301http://www.jiit.ac.in/jiit/icsc/ICSC/tpc-members.php 

Committees and Boards

  • Member of Editorial Board of  International Scholarly Research Network (ISRN) Electronics - http://www.isrn.com/32538140/
  • Expert Member  - Directory of researchers working in the country in the area of Nano Science and Technology, Nano Mission, Department of Science and Technology, Govt. of India
  • Member of Selection Committee - Engineering Sciences for selection of students and faculty members at National level for SRF programme.
  • Jury Member in  3rd National Level Exhibition and Project Competition (NLEPC), DST, Govt. of India, October 08-09, 2013, New Delhi
  • Jury Member in  4th National Level Exhibition and Project Competition (NLEPC), DST, Govt. of India, October 06-08, 2014, New Delhi
  • Jury Member in  5th National Level Exhibition and Project Competition (NLEPC), DST, Govt. of India, December 06-07, 2015, New Delhi
  • Jury Member - 7th National level Exhibition and Project Competition (NLEPC) of INSPIRE Awards-MANAK at Indian Institute of Technology (IIT) Delhi held during February 14-15, 2019.
  • Member-Faculty of Interdisciplinary and Applied Sciences, University of Delhi (2016) for a period of 3 years
  • National Committee Member - 22nd International Symposium on VLSI Design and Test ( VDAT - 2018 ) held during June 28th- June 30th 2018, Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Madurai – 625 015
  • Publicity Chair - 2018 IEEE Electron Device Kolkata Conference (2018 IEEE EDKCON) held in the The Pride Hotel, Kolkata, India during November 24-25, 2018 organized by IEEE EDS Kolkata Chapter
  • Advisory Committee Member  - 6th International Conference on Signal Processing and Integrated Networks (SPIN 2019) held during 7 - 8 March 2019 by Department of Electronics and Communication Engineering, ASET, Amity University, Sec-125, Noida, Delhi-NCR, India
  • Chaired technical session in one-day seminar on "Life and Works of Prof. M. N. Saha and Prof. S. N. Bose" on 15th September, 2018 organized by Department of Physics, Jaypee Institute of Information Technology, (Deemed University), A-10, Sector-62, Noida, UP-201307
  • International Steering Committee Member – 2019 IEEE International Conference on Modeling of System Circuits and Devices (MOS-AK India 2019) organized by joint chapter of CAS/ED Societies IEEE Hyderabad Section, IIT Hyderabad during February 25-27, 2019.

Memberships

  • Vice Chair – IEEE EDS SRC Region 10 (2016-2017)
  • Regional Editor IEEE EDS Newsletter – Region 10 South Asia (2015-2017, 2018-)
  • Senior Member – IEEE, USA (July 2008 - )
  • MIET - Member – Institution of Engineering and Technology (IET), United Kingdom (UK) (2008-)
  • Member - International Association of Engineers, Hong Kong
  • MInstP - Member – Institute of Physics (IOP), (May 2011 - )
  • Member of Editorial Board of  International Scholarly Research Network (ISRN) Electronics
  • Expert Member  - Directory of researchers, Nano Mission, DST, Govt. of India
  • Associate – Indian Academy of Sciences (IAS), India (2009 – 2012)
  • M. N. A. Sc – Member, National Academy of Sciences India (NASI), Allahabad, India (2009 - )
  • Life Member – Semiconductor Society of India, New Delhi, India
  • Life Member - Indian Science Congress Association (ISCA)

Office Bearer

  • Secretary-IEEE Delhi Section (April 2019 - December 2019)
  • Member-IEEE Delhi Section (January 2018 – March 2019 )
  • Chapter Advisor – The National Academy of Sciences, India – Delhi Chapter (2016 -)
  • Secretary – IEEE EDS Delhi Chapter, New Delhi, India (2010 – 2017)
  • Secretary - Institute of Physics (UK)- Delhi Chapter (2013 - 2014)
  • Executive Committee Member – IET(UK) Delhi Network (2013 - 2014 )
  • Joint Secretary – Society for VLSI and Microelectronics, New Delhi, India (2008- Till date)
  • Joint Secretary and Treasurer – IEEE EDS Delhi Chapter, New Delhi, India (2009)
 

 

 
Other Activities
Workshop/ Seminars/ Conferences Attended:
  • Indian Academy of Sciences, Platinum Jubliee Meeting, Bangalore, November 12-14, 2009
  • Bhabha Centenary Symposium, Tata Institute of Fundamental Research,  Mumbai, India, December 03-05, 2009
  • Indian Academy of Sciences 76th Annual Meeting 2010, Goa, 12 to 14 November 2010
 
Assignment, Notes for Students

B. Sc. Hons. Electronics – CBCS Scheme University of Delhi 2015-2018 - Analog Electronics - Course Outline and Suggested Books